* Switch to GNAT FSF 12 support
* GNAT FSF 12 in GitHub CI
* Update README.md
* Remove run-time dependency build script that is not compatible with GNAT FSF
This script is also not needed as all the BSPs are included in GNAT FSF.
* Correct the transmit protocol for Nordic TWI.
The register address and the data must be sent in one operation, as
specified in the nRF51 Series Reference Manual version 3.0.
* arch/ARM/Nordic/drivers/nrf_common/nrf-twi.adb:
(Master_Transmit): Clear any previous Suspend/Stop settings before
the transfer.
Only do a Stop_Sequence if requested.
(Mem_Write): Call Master_Transmit to send the data as well as the
register address in one transaction. This requires moving the
Do_Stop_Sequence setting to before this single transaction.
* Revert Nordic TWI Mem_Write to original.
Avoids creating a potentially large data buffer on the stack.
* arch/ARM/Nordic/drivers/nrf_common/nrf-twi.adb (Mem_Write): reverted to
sending the register address without a stop sequence, followed by the
data, followed by a stop sequence.
* Use symbolic interrupt priority for SDMMC.
* arch/ARM/STM32/drivers/sd/stm32-sdmmc_interrupt.ads
(SDMMC_Interrupt_Handler): Supply the required interrupt priority via
a discriminant.
* Added omitted 'with System'.
* arch/ARM/STM32/drivers/sd/stm32-sdmmc_interrupt.ads: as summary.
* Matching change for boards where SDCard is used.
* boards/stm32_common/sdcard/sdcard.adb (SD_Interrupt_Handler):
include Priority discriminant.
* Add GPIO interrupt support for Nordic GPIO.
* arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.ad[sb]:
Added subprograms to enable, test for presence, acknowledge and
disable both channel and port interrupts.
* Correct style warnings for Nordic GPIO interrupts.
* Match Nordic GPIO changes to AdaCore style.
* arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.ads
(Channel_Event_Is_Set): renamed to Channel_Event_Set.
(Port_Event_Is_Set): similarly.
* arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.adb:
likewise. Keyword 'is' always on new line.
* Add RISC-V performance CSR support
* RISC-V Read_CSR_64: fix rv32 version
* RISC-V improve CSR support
Add sub-program to swap, set bits, clear bits, etc.
Instantiate sub-programs for all machine CSRs.
* arch/ARM/cortex_m/src/semihosting.adb (Write_0): Data is of new
type Byte_Array, which is a new UInt8_Array with volatile
components (FSF GCC was miscompiling at -O3).
This allows for a unified driver in families that have members on both
sides. Useful for nRF family, but also should lower-end STM32 parts become
supported in the future.
Instead of returning False when a configuration is not supported, users
can call a function beforehand to know if it is supported. The
capability is also now a precondition of the setup procedures.
Maxim Reznik
Fabien Chouteau
Simon Wright
Marc Poulhiès
Pat Rogers
Jeremy Grosser
Roderick Chapman
Lambourg Jérôme
Michael du Breuil
Shawn Nock
Fabien Chouteau
Francesc Rocher
Alessandro Felicetti