mirror of https://github.com/openssl/openssl
SHA-1 for x86_64.
This commit is contained in:
Andy Polyakov
parent
b010b7c434
commit
ba3b2f1538
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@ -118,7 +118,7 @@ my $x86_elf_asm="x86cpuid-elf.o:bn86-elf.o co86-elf.o mo86-elf.o:dx86-elf.o yx86
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my $x86_coff_asm="x86cpuid-cof.o:bn86-cof.o co86-cof.o mo86-cof.o:dx86-cof.o yx86-cof.o:ax86-cof.o:bx86-cof.o:mx86-cof.o:sx86-cof.o s512sse2-cof.o:cx86-cof.o:rx86-cof.o:rm86-cof.o:r586-cof.o:wp_block.o w86mmx-cof.o";
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my $x86_out_asm="x86cpuid-out.o:bn86-out.o co86-out.o mo86-out.o:dx86-out.o yx86-out.o:ax86-out.o:bx86-out.o:mx86-out.o:sx86-out.o s512sse2-out.o:cx86-out.o:rx86-out.o:rm86-out.o:r586-out.o:wp_block.o w86mmx-out.o";
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my $x86_64_asm="x86_64cpuid.o:x86_64-gcc.o x86_64-mont.o::aes-x86_64.o::md5-x86_64.o:sha256-x86_64.o sha512-x86_64.o::rc4-x86_64.o:::wp-x86_64.o";
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my $x86_64_asm="x86_64cpuid.o:x86_64-gcc.o x86_64-mont.o::aes-x86_64.o::md5-x86_64.o:sha1-x86_64.o sha256-x86_64.o sha512-x86_64.o::rc4-x86_64.o:::wp-x86_64.o";
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my $ia64_asm="ia64cpuid.o:bn-ia64.o::aes_core.o aes_cbc.o aes-ia64.o::md5-ia64.o:sha1-ia64.o sha256-ia64.o sha512-ia64.o::rc4-ia64.o:::";
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my $sparcv9_asm="sparcv9cap.o sparccpuid.o:bn-sparcv9.o sparcv9-mont.o sparcv9a-mont.o:des_enc-sparc.o fcrypt_b.o:aes_core.o aes_cbc.o aes-sparcv9.o::md5-sparcv9.o::::::";
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my $no_asm=":::::::::::";
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@ -64,6 +64,8 @@ sha256-ia64.s: asm/sha512-ia64.pl
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(cd asm; $(PERL) sha512-ia64.pl ../$@ $(CFLAGS))
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sha512-ia64.s: asm/sha512-ia64.pl
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(cd asm; $(PERL) sha512-ia64.pl ../$@ $(CFLAGS))
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sha1-x86_64.s: asm/sha1-x86_64.pl
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$(PERL) asm/sha1-x86_64.pl $@
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sha256-x86_64.s: asm/sha512-x86_64.pl
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$(PERL) asm/sha512-x86_64.pl $@
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sha512-x86_64.s: asm/sha512-x86_64.pl
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@ -0,0 +1,239 @@
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#!/usr/bin/env perl
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#
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# ====================================================================
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# Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
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# project. Rights for redistribution and usage in source and binary
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# forms are granted according to the OpenSSL license.
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# ====================================================================
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#
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# sha1_block procedure for x86_64.
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#
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# It was brought to my attention that on EM64T compiler-generated code
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# was far behind 32-bit assembler implementation. This is unlike on
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# Opteron where compiler-generated code was only 15% behind 32-bit
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# assembler, which originally made it hard to motivate the effort.
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# There was suggestion to mechanically translate 32-bit code, but I
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# dismissed it, reasoning that x86_64 offers enough register bank
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# capacity to fully utilize SHA-1 parallelism. Therefore this fresh
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# implementation:-) However! While 64-bit code does performs better
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# on Opteron, I failed to beat 32-bit assembler on EM64T core. Well,
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# x86_64 does offer larger *addressable* bank, but out-of-order core
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# reaches for even more registers through dynamic aliasing, and EM64T
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# core must have managed to run-time optimize even 32-bit code just as
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# good as 64-bit one. Performance improvement is summarized in the
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# following table:
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#
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# gcc 3.4 32-bit asm cycles/byte
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# Opteron +45% +20% 6.8
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# Xeon +65% +0% 9.9
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$output=shift;
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open STDOUT,"| $^X ../perlasm/x86_64-xlate.pl $output";
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$ctx="%rdi"; # 1st arg
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$inp="%rsi"; # 2nd arg
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$num="%rdx"; # 3rd arg
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# reassign arguments in order to produce more compact code
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$ctx="%r8";
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$inp="%r9";
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$num="%r10";
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$xi="%eax";
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$t0="%ebx";
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$t1="%ecx";
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$A="%edx";
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$B="%esi";
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$C="%edi";
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$D="%ebp";
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$E="%r11d";
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$T="%r12d";
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@V=($A,$B,$C,$D,$E,$T);
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sub PROLOGUE {
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my $func=shift;
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$code.=<<___;
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.globl $func
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.type $func,\@function,3
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.align 16
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$func:
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push %rbx
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push %rbp
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push %r12
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mov %rsp,%rax
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mov %rdi,$ctx # reassigned argument
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sub \$`8+16*4`,%rsp
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mov %rsi,$inp # reassigned argument
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and \$-64,%rsp
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mov %rdx,$num # reassigned argument
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mov %rax,`16*4`(%rsp)
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mov 0($ctx),$A
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mov 4($ctx),$B
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mov 8($ctx),$C
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mov 12($ctx),$D
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mov 16($ctx),$E
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___
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}
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sub EPILOGUE {
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my $func=shift;
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$code.=<<___;
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mov `16*4`(%rsp),%rsp
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pop %r12
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pop %rbp
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pop %rbx
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ret
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.size $func,.-$func
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___
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}
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sub BODY_00_19 {
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my ($i,$a,$b,$c,$d,$e,$f,$host)=@_;
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my $j=$i+1;
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$code.=<<___ if ($i==0);
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mov `4*$i`($inp),$xi
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`"bswap $xi" if(!defined($host))`
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mov $xi,`4*$i`(%rsp)
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___
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$code.=<<___ if ($i<15);
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lea 0x5a827999($xi,$e),$f
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mov $c,$t0
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mov `4*$j`($inp),$xi
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mov $a,$e
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xor $d,$t0
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`"bswap $xi" if(!defined($host))`
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rol \$5,$e
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and $b,$t0
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mov $xi,`4*$j`(%rsp)
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add $e,$f
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xor $d,$t0
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rol \$30,$b
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add $t0,$f
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___
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$code.=".Lshortcut:\n" if ($i==15);
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$code.=<<___ if ($i>=15);
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lea 0x5a827999($xi,$e),$f
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mov `4*($j%16)`(%rsp),$xi
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mov $c,$t0
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mov $a,$e
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xor `4*(($j+2)%16)`(%rsp),$xi
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xor $d,$t0
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rol \$5,$e
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xor `4*(($j+8)%16)`(%rsp),$xi
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and $b,$t0
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add $e,$f
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xor `4*(($j+13)%16)`(%rsp),$xi
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xor $d,$t0
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rol \$30,$b
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add $t0,$f
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rol \$1,$xi
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mov $xi,`4*($j%16)`(%rsp)
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___
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}
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sub BODY_20_39 {
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my ($i,$a,$b,$c,$d,$e,$f)=@_;
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my $j=$i+1;
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my $K=($i<40)?0x6ed9eba1:0xca62c1d6;
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$code.=<<___ if ($i<79);
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lea $K($xi,$e),$f
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mov `4*($j%16)`(%rsp),$xi
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mov $c,$t0
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mov $a,$e
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xor `4*(($j+2)%16)`(%rsp),$xi
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xor $b,$t0
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rol \$5,$e
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xor `4*(($j+8)%16)`(%rsp),$xi
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xor $d,$t0
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add $e,$f
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xor `4*(($j+13)%16)`(%rsp),$xi
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rol \$30,$b
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add $t0,$f
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rol \$1,$xi
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mov $xi,`4*($j%16)`(%rsp)
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___
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$code.=<<___ if ($i==79);
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lea $K($xi,$e),$f
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mov $c,$t0
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mov $a,$e
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xor $b,$t0
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rol \$5,$e
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xor $d,$t0
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add $e,$f
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rol \$30,$b
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add $t0,$f
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___
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}
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sub BODY_40_59 {
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my ($i,$a,$b,$c,$d,$e,$f)=@_;
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my $j=$i+1;
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$code.=<<___;
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lea 0x8f1bbcdc($xi,$e),$f
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mov `4*($j%16)`(%rsp),$xi
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mov $b,$t0
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mov $b,$t1
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xor `4*(($j+2)%16)`(%rsp),$xi
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mov $a,$e
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and $c,$t0
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xor `4*(($j+8)%16)`(%rsp),$xi
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or $c,$t1
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rol \$5,$e
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xor `4*(($j+13)%16)`(%rsp),$xi
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and $d,$t1
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add $e,$f
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rol \$1,$xi
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or $t1,$t0
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rol \$30,$b
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mov $xi,`4*($j%16)`(%rsp)
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add $t0,$f
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___
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}
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$code=".text\n";
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&PROLOGUE("sha1_block_asm_data_order");
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$code.=".align 4\n.Lloop:\n";
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for($i=0;$i<20;$i++) { &BODY_00_19($i,@V); unshift(@V,pop(@V)); }
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for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
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for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
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$code.=<<___;
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add 0($ctx),$E
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add 4($ctx),$T
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add 8($ctx),$A
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add 12($ctx),$B
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add 16($ctx),$C
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mov $E,0($ctx)
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mov $T,4($ctx)
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mov $A,8($ctx)
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mov $B,12($ctx)
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mov $C,16($ctx)
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xchg $E,$A # mov $E,$A
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xchg $T,$B # mov $T,$B
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xchg $E,$C # mov $A,$C
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xchg $T,$D # mov $B,$D
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# mov $C,$E
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lea `16*4`($inp),$inp
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sub \$1,$num
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jnz .Lloop
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___
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&EPILOGUE("sha1_block_asm_data_order");
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####################################################################
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@V=($A,$B,$C,$D,$E,$T);
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&PROLOGUE("sha1_block_asm_host_order");
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for($i=0;$i<15;$i++) { &BODY_00_19($i,@V,1); unshift(@V,pop(@V)); }
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$code.=<<___;
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jmp .Lshortcut
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.size sha1_block_asm_host_order,.-sha1_block_asm_host_order
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___
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$code =~ s/\`([^\`]*)\`/eval $1/gem;
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print $code;
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close STDOUT;
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@ -115,7 +115,8 @@
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# endif
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# ifdef SHA1_ASM
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__)
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# if defined(__i386) || defined(__i386__) || defined(_M_IX86) || defined(__INTEL__) \
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|| defined(__x86_64) || defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
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# define sha1_block_host_order sha1_block_asm_host_order
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# define DONT_IMPLEMENT_BLOCK_HOST_ORDER
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# define sha1_block_data_order sha1_block_asm_data_order
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