arm64: renesas: Update RZG2LC device-tree's to use unified dtsis

This brings the RZG2LC SOM and Carrier device-tree's functionally
in line with the G2L and V2L unified device-tree. It is consuming
the rz_2l-sr-som-common.dtsi rz-hummingboard-common.dtsi files
and adjusting the configurations as needed based on hardware
differences, such as GPIO differences due to the different SOC.

Move the eth1 node to the specific rzg2l and rzv2l som dtsi's since
that node is not supported by the UL/G2LC families.

Signed-off-by: Jon Nettleton <jon@solid-run.com>

arch/arm64/boot/dts/renesas/rz-hummingboard-common.dtsi

@@ -158,7 +158,7 @@
 	clock-frequency = <400000>;
 	status = "okay";
 
-	adv7535@3d {
+	adv7535: adv7535@3d {
 		compatible = "adi,adv7535";
 		reg = <0x3d>;
 		adi,dsi-lanes = <4>;

arch/arm64/boot/dts/renesas/rz_2l-sr-som-common.dtsi

@@ -21,7 +21,6 @@
 		mmc0 = &sdhi0;
 		mmc1 = &sdhi1;
 		ethernet0 = &eth0;
-		ethernet1 = &eth1;
 	};
 
 	chosen {
@@ -115,29 +114,6 @@
 	};
 };
 
-&eth1 {
-	pinctrl-0 = <&eth1_pins>;
-	pinctrl-names = "default";
-	phy-handle = <&phy1>;
-	phy-mode = "rgmii-id";
-	status = "disabled";
-	renesas,no-ether-link;
-
-	phy1: ethernet-phy@0 {
-		reg = <0>;
-		mxl-8611x,led0_cfg = <(
-			MXL8611X_LEDX_CFG_LINK_UP_TX_ACT_ON |
-			MXL8611X_LEDX_CFG_LINK_UP_RX_ACT_ON |
-			MXL8611X_LEDX_CFG_LINK_UP_1GB_ON |
-			MXL8611X_LEDX_CFG_LINK_UP_100MB_ON |
-			MXL8611X_LEDX_CFG_LINK_UP_10MB_ON
-		)>;
-		mxl-8611x,rx-internal-delay-ps = <0>;
-		mxl-8611x,tx-internal-delay-ps-100m = <2250>;
-		mxl-8611x,tx-internal-delay-ps-1g = <300>;
-	};
-};
-
 &extal_clk {
 	clock-frequency = <24000000>;
 };

arch/arm64/boot/dts/renesas/rzg2l-sr-som.dtsi

@@ -12,6 +12,20 @@
 #include "rz_2l-sr-som-common.dtsi"
 
 / {
+        aliases {
+                serial0 = &scif0;
+                serial1 = &scif1;
+                serial2 = &scif2;
+                serial3 = &scif3;
+                i2c0 = &i2c0;
+                i2c1 = &i2c1;
+                i2c3 = &i2c3;
+                mmc0 = &sdhi0;
+                mmc1 = &sdhi1;
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+        };
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -37,3 +51,25 @@
 	};
 };
 
+&eth1 {
+        pinctrl-0 = <&eth1_pins>;
+        pinctrl-names = "default";
+        phy-handle = <&phy1>;
+        phy-mode = "rgmii-id";
+        status = "disabled";
+        renesas,no-ether-link;
+
+        phy1: ethernet-phy@0 {
+                reg = <0>;
+                mxl-8611x,led0_cfg = <(
+                        MXL8611X_LEDX_CFG_LINK_UP_TX_ACT_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_RX_ACT_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_1GB_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_100MB_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_10MB_ON
+                )>;
+                mxl-8611x,rx-internal-delay-ps = <0>;
+                mxl-8611x,tx-internal-delay-ps-100m = <2250>;
+                mxl-8611x,tx-internal-delay-ps-1g = <300>;
+        };
+};

arch/arm64/boot/dts/renesas/rzg2lc-hummingboard.dts

@@ -18,108 +18,30 @@
 
 /dts-v1/;
 #include "rzg2lc-sr-som.dtsi"
-#include "rzg2lc-sr-pinfunction.dtsi"
+#include "rz-hummingboard-common.dtsi"
 
 / {
-  model = "Solidrun RZ/G2LC SOM";
-  compatible = "renesas,r9a07g044c2", "renesas,r9a07g044";
+  model = "Solidrun RZ/G2LC HummingBoard-Ripple";
+  compatible = "renesas,rzg2lc-sr-som", "renesas,r9a07g044c2", "renesas,r9a07g044";
+};
 
-  x1_clk: x1-clock {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24000000>;
-	};
-
-	hdmi-out {
-		compatible = "hdmi-connector";
-		type = "d";
-
-		port {
-			hdmi_con_out: endpoint {
-			remote-endpoint = <&adv7535_out>;
-			};
-		};
-	};
+&adv7535 {
+	pd-gpios = <&pinctrl RZG2L_GPIO(40, 2) GPIO_ACTIVE_LOW>; // ADV_PD / DSI_EN J9-34 / P40_2
 };
 
 &pinctrl {
-  gpio-lte_on {
-    gpio-hog;
-    gpios = <RZG2L_GPIO(19, 1) GPIO_ACTIVE_HIGH>;
-    output-high;
-    line-name = "gpio_lte_on";
-  };
-};
+	/delete-node/ gpio-lte_reset;
 
-&i2c0 {
-	adv7535@3d {
-		compatible = "adi,adv7535";
-		reg = <0x3d>;
-		adi,dsi-lanes = <4>;
-		pd-gpios = <&pinctrl RZG2L_GPIO(40, 2) GPIO_ACTIVE_LOW>; // ADV_PD / DSI_EN J9-34 / P40_2
-		/*
-		 * With interrupts enabled and hdmi connected during boot,
-		 * rzg2l_mipi_dsi_enable never happens and display receives no signal.
-		 * Re-enable once issue has been resolved.
-		 *
-		 * interrupt-parent = <&pinctrl>;
-		 * interrupts = <RZG2L_GPIO(42, 2) IRQ_TYPE_EDGE_FALLING>; // DSI_TS_nINT J5001-43 P42_2
-		 */
-		status = "okay";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			port@0 {
-				reg = <0>;
-				adv7535_in: endpoint@0 {
-					remote-endpoint = <&dsi0_out>;
-				};
-			};
-
-			port@1 {
-				reg = <1>;
-				adv7535_out: endpoint@1 {
-					remote-endpoint = <&hdmi_con_out>;
-				};
-			};
-
-			port@2 {
-				reg = <2>;
-				codec_endpoint: endpoint {
-					/* Audio signals not connected. */
-				};
-			};
-		};
+	gpio-lte_on {
+		gpio-hog;
+		gpios = <RZG2L_GPIO(19, 1) GPIO_ACTIVE_HIGH>;
+		output-high;
+		line-name = "gpio_lte_on";
 	};
-
-	rtc@69 {
-		compatible = "abracon,abx80x";
-		reg = <0x69>;
-		abracon,tc-diode = "schottky";
-		abracon,tc-resistor = <3>;
-	};
-
-  eeprom_carrier: eeprom@57 {
-    compatible = "st,24c02", "atmel,24c02";
-    reg = <0x57>;
-    pagesize = <16>;
-  };
-
 };
 
-&dsi0 {
-	status = "okay";
-};
-
-&dsi0_out {
-	remote-endpoint = <&adv7535_in>;
-	data-lanes = <1 2 3 4>;
-};
-
-&du {
-	status = "okay";
+&reg_sdhi0_vmmc {
+	gpio = <&pinctrl RZG2L_GPIO(18, 1) GPIO_ACTIVE_LOW>;
 };
 
 &scif1 {
@@ -130,24 +52,17 @@
 	status = "okay";
 };
 
-&canfd {
-	/delete-property/ pinctrl-0;
-	/delete-property/ pinctrl-names;
-	status = "disabled";
-};
-
-&spi1 {
-	/delete-property/ pinctrl-0;
-	/delete-property/ pinctrl-names;
-	status = "disabled";
+&sdhi0 {
+	cd-gpios = <&pinctrl RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW>;
 };
 
 &usb0_vbus_otg {
-	gpio = <&pinctrl RZG2L_GPIO(4, 0) GPIO_OPEN_DRAIN>;
+	gpio = <&pinctrl RZG2L_GPIO(4, 0) GPIO_ACTIVE_HIGH>;
 	gpio-open-drain;
 };
 
 &usb1_vbus {
-	gpio = <&pinctrl RZG2L_GPIO(5, 0) GPIO_OPEN_DRAIN>;
+	gpio = <&pinctrl RZG2L_GPIO(5, 0) GPIO_ACTIVE_HIGH>;
 	gpio-open-drain;
 };
+

arch/arm64/boot/dts/renesas/rzg2lc-sr-pinfunction.dtsi

@@ -1,99 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-/*
- * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
- *
- * Copyright (C) 2021 Renesas Electronics Corp.
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
-
-&pinctrl {
-	pinctrl-0 = <&sound_clk_pins>;
-	pinctrl-names = "default";
-
-	i2c0_pins: i2c0 {
-		pins = "RIIC0_SDA", "RIIC0_SCL";
-		input-enable;
-	};
-
-	i2c1_pins: i2c1 {
-		pins = "RIIC1_SDA", "RIIC1_SCL";
-		input-enable;
-	};
-
-	i2c2_pins: i2c2 {
-		pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
-			 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
-	};
-
-	scif0_pins: scif0 {
-		pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>,	/* TxD */
-			 <RZG2L_PORT_PINMUX(38, 1, 1)>;	/* RxD */
-	};
-
-	scif1_pins: scif1 {
-		pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
-			 <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
-			 <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
-			 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
-	};
-
-    scif2_pins: scif2 {
-        pinmux = <RZG2L_PORT_PINMUX(42, 0, 4)>, /* TxD */
-            <RZG2L_PORT_PINMUX(42, 1, 4)>, /* RxD */
-            <RZG2L_PORT_PINMUX(5, 1, 2)>, /* CTS# */
-            <RZG2L_PORT_PINMUX(5, 2, 2)>; /* RTS# */
-    };
-
-	sdhi1_pins: sd1 {
-		sd1_data {
-			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
-			power-source = <3300>;
-		};
-
-		sd1_ctrl {
-			pins = "SD1_CLK", "SD1_CMD";
-			power-source = <3300>;
-		};
-
-		sd1_mux {
-			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
-		};
-	};
-
-	sdhi1_pins_uhs: sd1_uhs {
-		sd1_data_uhs {
-			pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
-			power-source = <1800>;
-		};
-
-		sd1_ctrl_uhs {
-			pins = "SD1_CLK", "SD1_CMD";
-			power-source = <1800>;
-		};
-
-		sd1_mux_uhs {
-			pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
-		};
-	};
-
-	sound_clk_pins: sound_clk {
-		pins = "AUDIO_CLK1", "AUDIO_CLK2";
-		input-enable;
-	};
-
-	spi1_pins: spi1 {
-		pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
-			 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
-			 <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
-			 <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
-	};
-
-	ssi0_pins: ssi0 {
-		pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
-			 <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
-			 <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
-			 <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
-	};
-};

arch/arm64/boot/dts/renesas/rzg2lc-sr-som.dtsi

@@ -10,22 +10,19 @@
 #include "r9a07g044c2.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
+
+#include "rz_2l-sr-som-common.dtsi"
 
 / {
 	aliases {
-    serial0 = &scif0;
-    serial1 = &scif1;
-    i2c0 = &i2c0;
-    i2c1 = &i2c1;
+		serial0 = &scif0;
+		serial1 = &scif1;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
 		i2c2 = &i2c2;
-    mmc0 = &sdhi0;
-    mmc1 = &sdhi1;
-    ethernet0 = &eth0;
-	};
-
-	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+		mmc0 = &sdhi0;
+		mmc1 = &sdhi1;
+		ethernet0 = &eth0;
 	};
 
 	memory@48000000 {
@@ -39,91 +36,22 @@
 		#size-cells = <2>;
 		ranges;
 
-		global_cma: linux,cma@58000000 {
-			compatible = "shared-dma-pool";
-			linux,cma-default;
-			reusable;
-			reg = <0x0 0x58000000 0x0 0x10000000>;
-		};
-		mmp_reserved: linux,multimedia {
+                multimedia_cma: linux,multimedia {
+                        compatible = "shared-dma-pool";
+                        reusable;
+                        size = <0x0 0x10000000>;
+                };
+
+		mmp_reserved: linux,mmp {
 			compatible = "shared-dma-pool";
 			reusable;
 			reg = <0x00000000 0x68000000 0x0 0x8000000>;
 		};
 	};
-
-	mmngr {
-		compatible = "renesas,mmngr";
-		memory-region = <&mmp_reserved>;
-	};
-
-	mmngrbuf {
-		compatible = "renesas,mmngrbuf";
-	};
-
-	vspm_if {
-		compatible = "renesas,vspm_if";
-	};
-
-	reg_1p8v: regulator0 {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-1.8V";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	reg_3p3v: regulator1 {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-  chosen {
-    stdout-path = "serial0:115200n8";
-  };
-
-  usb0_vbus_otg: regulator-usb0-vbus-otg {
-    compatible = "regulator-fixed";
-    regulator-name = "USB0_VBUS_OTG";
-    regulator-min-microvolt = <5000000>;
-    regulator-max-microvolt = <5000000>;
-	gpio = <&pinctrl RZG2L_GPIO(4, 0) GPIO_ACTIVE_HIGH>;
-	enable-active-high;
-  };
-
-  usb1_vbus: regulator-usb1-vbus {
-	compatible = "regulator-fixed";
-	regulator-name = "USB1_VBUS";
-	regulator-min-microvolt = <5000000>;
-	regulator-max-microvolt = <5000000>;
-	gpio = <&pinctrl RZG2L_GPIO(5, 0) GPIO_ACTIVE_HIGH>;
-	enable-active-high;
-  };
-
-  vccq_sdhi1: regulator-vccq-sdhi1 {
-	compatible = "regulator-fixed";
-	regulator-name = "WL_REG_ON";
-	regulator-min-microvolt = <3300000>;
-	regulator-max-microvolt = <3300000>;
-	gpio = <&pinctrl RZG2L_GPIO(23, 0) GPIO_ACTIVE_HIGH>;
-	enable-active-high;
-  };
 };
 
 &eth0 {
-	pinctrl-0 = <&eth0_pins>;
-	pinctrl-names = "default";
-	phy-handle = <&phy0>;
-	phy-mode = "rgmii-id";
-	status = "okay";
-	renesas,no-ether-link;
-
-    phy0: ethernet-phy@0 {
+	phy0: ethernet-phy@0 {
 		reg = <0>;
 		max-speed = <100>;  /* configure ethernet max speed for ethernet0 */
 		/*
@@ -134,257 +62,6 @@
 	};
 };
 
-&extal_clk {
-	clock-frequency = <24000000>;
-};
-
-&ostm1 {
-	status = "okay";
-};
-
-&ostm2 {
-	status = "okay";
-};
-
-&pinctrl {
-	eth0_pins: eth0 {
-		pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
-			 <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
-			 <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
-			 <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
-			 <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
-			 <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
-			 <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
-			 <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
-			 <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
-			 <RZG2L_PORT_PINMUX(24, 0, 1)>, /* ET0_RXC */
-			 <RZG2L_PORT_PINMUX(24, 1, 1)>, /* ET0_RX_CTL */
-			 <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
-			 <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
-			 <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
-			 <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
-	};
-
-	gpio-sd0-pwr-en-hog {
-		gpio-hog;
-		gpios = <RZG2L_GPIO(18, 1) GPIO_ACTIVE_LOW>;
-		output-high;
-		line-name = "gpio_sd0_pwr_en";
-	};
-
-	qspi0_pins: qspi0 {
-		qspi0-data {
-			pins = "QSPI0_IO0", "QSPI0_IO1", "QSPI0_IO2", "QSPI0_IO3";
-			power-source = <1800>;
-		};
-
-		qspi0-ctrl {
-			pins = "QSPI0_SPCLK", "QSPI0_SSL", "QSPI_RESET#";
-			power-source = <1800>;
-		};
-	};
-
-	/*
-	 * The below switch logic can be used to select the device between
-	 * eMMC and microSD, after setting GPIO_SD0_DEV_SEL to high in DT.
-	 * S3[6] should be at OFF position to enable eMMC
-	 * S3[6] should be at position ON to enable uSD card
-	 */
-
-	/*
-	 * TODO: implement device-selection for SolidRun SoM / Carrier
-	 *
-	 */
-
-	/* eMMC/uSD Settings*/
-	sel_emmc: gpio-sd0-dev-sel-hog {
-		gpio-hog;
-		gpios = <RZG2L_GPIO(22, 1) GPIO_ACTIVE_LOW>;
-		#if (!SW_SD0_DEV_SEL)
-			output-low; /*uSD*/
-		#else
-			output-high; /*eMMC*/
-		#endif
-		line-name = "gpio_sd0_dev_sel_emmc";
-		status = "okay";
-	};
-
-	/* P39_0 - LDO_SEL1 (High: 3.3v [SD]; Low: 1.8v [eMMC]) */
-	gpio_sel_emmc: gpio-sd0-vdd-18v-hog {
-		gpio-hog;
-		gpios = <RZG2L_GPIO(39, 0) GPIO_ACTIVE_LOW>;
-		#if (!SW_SD0_DEV_SEL)
-			output-low; /*uSD*/
-		#else
-			output-high; /*eMMC*/
-		#endif
-		line-name = "gpio_sd0_vdd_1.8v";
-		status = "okay";
-	};
-
-	sdhi0_emmc_pins: sd0emmc {
-		sd0_emmc_data {
-			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3",
-			       "SD0_DATA4", "SD0_DATA5", "SD0_DATA6", "SD0_DATA7";
-			power-source = <1800>;
-		};
-
-		sd0_emmc_ctrl {
-			pins = "SD0_CLK", "SD0_CMD";
-			power-source = <1800>;
-		};
-
-		sd0_emmc_rst {
-			pins = "SD0_RST#";
-			power-source = <1800>;
-		};
-	};
-
-	sdhi0_pins: sd0 {
-		sd0_data {
-			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
-			power-source = <3300>;
-		};
-
-		sd0_ctrl {
-			pins = "SD0_CLK", "SD0_CMD";
-			power-source = <3300>;
-		};
-
-		sd0_mux {
-			pinmux = <RZG2L_PORT_PINMUX(18, 0, 1)>; /* SD0_CD */
-		};
-	};
-
-	sdhi0_pins_uhs: sd0_uhs {
-		sd0_data_uhs {
-			pins = "SD0_DATA0", "SD0_DATA1", "SD0_DATA2", "SD0_DATA3";
-			power-source = <1800>;
-		};
-
-		sd0_ctrl_uhs {
-			pins = "SD0_CLK", "SD0_CMD";
-			power-source = <1800>;
-		};
-
-		sd0_mux_uhs {
-			pinmux = <RZG2L_PORT_PINMUX(18, 0, 1)>; /* SD0_CD */
-		};
-	};
-};
-
-&sbc {
-	pinctrl-0 = <&qspi0_pins>;
-	pinctrl-names = "default";
-	status = "disabled";
-};
-
-#if (!SW_SD0_DEV_SEL)
-/* uSD */
-&sdhi0 {
-	pinctrl-0 = <&sdhi0_pins>;
-	pinctrl-1 = <&sdhi0_pins_uhs>;
-	pinctrl-names = "default", "state_uhs";
-
-	vmmc-supply = <&reg_3p3v>;
-	vqmmc-supply = <&reg_1p8v>;
-	bus-width = <4>;
-//	non-removable;
-  	max-frequency = <50000000>;
-	status = "okay";
-};
-#endif
-
-#if SW_SD0_DEV_SEL
-/* eMMC */
-&sdhi0 {
-	pinctrl-0 = <&sdhi0_emmc_pins>;
-	pinctrl-1 = <&sdhi0_emmc_pins>;
-	pinctrl-names = "default", "state_uhs";
-
-	vmmc-supply = <&reg_3p3v>;
-	vqmmc-supply = <&reg_1p8v>;
-	bus-width = <8>;
-	mmc-hs200-1_8v;
-	non-removable;
-	fixed-emmc-driver-type = <1>;
-	status = "okay";
-};
-#endif
-
-&wdt0 {
-	status = "okay";
-	timeout-sec = <60>;
-};
-
-&wdt1 {
-	status = "okay";
-	timeout-sec = <60>;
-};
-
-&wdt2 {
-	status = "okay";
-	timeout-sec = <60>;
-};
-
-&ehci0 {
-	memory-region = <&global_cma>;
-};
-
-&ohci0 {
-	memory-region = <&global_cma>;
-};
-
-&ehci1 {
-	memory-region = <&global_cma>;
-};
-
-&ohci1 {
-	memory-region = <&global_cma>;
-};
-
-&i2c2 {
-	pinctrl-0 = <&i2c2_pins>;
-	pinctrl-names = "default";
-	clock-frequency = <400000>;
-
-	status = "okay";
-
-	pmic: raa215300@12 {
-		compatible = "renesas,raa215300";
-		reg = <0x12>;
-
-		rtc-enable;
-		mpio2-32k-enable;
-	};
-
-	rtc: isl1208@6f {
-		compatible = "isil,isl1208";
-		reg = <0x6f>;
-
-		//external-oscillator;
-	};
-
-};
-
-&canfd {
-	status = "disabled";
-};
-
-&ehci0 {
-	dr_mode = "otg";
-	status = "okay";
-};
-
-&ehci1 {
-	status = "okay";
-};
-
-&hsusb {
-	dr_mode = "otg";
-	status = "okay";
-};
-
 &i2c0 {
 	pinctrl-0 = <&i2c0_pins>;
 	pinctrl-names = "default";
@@ -399,106 +76,105 @@
 };
 
 &i2c1 {
-	pinctrl-0 = <&i2c1_pins>;
+	/delete-node/ eeprom@50;
+};
+
+&i2c2 {
+	pinctrl-0 = <&i2c2_pins>;
 	pinctrl-names = "default";
+	clock-frequency = <400000>;
+
 	status = "okay";
+
+	pmic: raa215300@12 {
+		compatible = "renesas,raa215300";
+		reg = <0x12>;
+		rtc-enable;
+		mpio2-32k-enable;
+	};
+
+	rtc: isl1208@6f {
+		compatible = "isil,isl1208";
+		reg = <0x6f>;
+	};
+
 };
 
-&ohci0 {
-	dr_mode = "otg";
-	status = "okay";
+&i2c3 {
+	/delete-property/ pinctrl-0;
+	/delete-property/ pinctrl-names;
+	status = "disabled";
+	/delete-node/ raa215300@12;
 };
 
-&ohci1 {
-	status = "okay";
+&pinctrl {
+	/delete-node/ eth1;
+	/delete-node/ i2c3;
+
+        gpio-sd0-dev-sel-hog {
+                gpio-hog;
+                gpios = <RZG2L_GPIO(22, 1) GPIO_ACTIVE_LOW>;
+                output-high;
+                line-name = "gpio_sd0_dev_sel";
+        };
+
+        i2c2_pins: i2c2 {
+                pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
+                         <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
+        };
+
+	scif2_pins: scif2 {
+		pinmux = <RZG2L_PORT_PINMUX(42, 0, 4)>, /* TxD */
+			 <RZG2L_PORT_PINMUX(42, 1, 4)>, /* RxD */
+			 <RZG2L_PORT_PINMUX(5, 1, 2)>, /* CTS# */
+			 <RZG2L_PORT_PINMUX(5, 2, 2)>; /* RTS# */
+	};
 };
 
-&phyrst {
-	status = "okay";
+&reg_sdhi0_vccq {
+	states = <3300000 0>, <1800000 1>;
+	gpios = <&pinctrl RZG2L_GPIO(39, 0) GPIO_ACTIVE_LOW>;
 };
 
-&scif0 {
-	pinctrl-0 = <&scif0_pins>;
+&sbc {
+	pinctrl-0 = <&qspi0_pins>;
 	pinctrl-names = "default";
-	status = "okay";
-};
-
-&scif1 {
-	pinctrl-0 = <&scif1_pins>;
-	pinctrl-names = "default";
-	uart-has-rtscts;
-	status = "okay";
+	status = "disabled";
 };
 
 &scif2 {
-	pinctrl-0 = <&scif2_pins>;
-	pinctrl-names = "default";
-	uart-has-rtscts;
-	status = "okay";
-
 	bluetooth {
 		compatible = "brcm,bcm4330-bt";
-		pinctrl-names = "default";
-		max-speed = <4000000>;
 		shutdown-gpios = <&pinctrl RZG2L_GPIO(23, 1) GPIO_ACTIVE_HIGH>;
 	};
 };
 
+#if SW_SD0_DEV_SEL
+/* eMMC */
+&sdhi0 {
+	pinctrl-0 = <&sdhi0_emmc_pins>;
+	pinctrl-1 = <&sdhi0_emmc_pins>;
+	pinctrl-names = "default", "state_uhs";
+
+	vmmc-supply = <&reg_3p3v>;
+	vqmmc-supply = <&reg_sdhi0_vccq>;
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	fixed-emmc-driver-type = <1>;
+	status = "okay";
+};
+#endif
+
 
 /* WiFi - CYW43439 */
 &sdhi1 {
-	#address-cells = <1>;
-	#size-cells = <0>;
-	pinctrl-0 = <&sdhi1_pins>;
-	pinctrl-1 = <&sdhi1_pins_uhs>;
-	pinctrl-names = "default", "state_uhs";
-	status = "okay";
-	non-removable;
-	vmmc-supply = <&reg_3p3v>;
-	vqmmc-supply = <&vccq_sdhi1>;
-	
-	bus-width = <4>;
-	max-frequency = <50000000>;
-	keep-power-in-suspend;
-
 	brcmf: wifi@1 {
 		reg = <1>;
 		compatible = "brcm,bcm4329-fmac";
 	};
 };
 
-&spi1 {
-	pinctrl-0 = <&spi1_pins>;
-	pinctrl-names = "default";
-	dmas = <&dmac 0x2e99>, <&dmac 0x2e9a>;
-	dma-names = "tx", "rx";
-
-	status = "okay";
-};
-
-&usb2_phy0 {
-	vbus-supply = <&usb0_vbus_otg>;
-	status = "okay";
-	renesas,no-otg-pins;
-};
-
-&usb2_phy1 {
-	vbus-supply = <&usb1_vbus>;
-	status = "okay";
-};
-
-&du {
-	status = "okay";
-};
-
-&dsi0 {
-	status = "okay";
-};
-
-&cru {
-	status = "okay";
-};
-
-&mtu3 {
-	status = "okay";
+&sdio_pwrseq {
+	reset-gpios = <&pinctrl RZG2L_GPIO(23, 0) GPIO_ACTIVE_LOW>;
 };

arch/arm64/boot/dts/renesas/rzv2l-sr-som.dtsi

@@ -13,6 +13,20 @@
 
 
 / {
+        aliases {
+                serial0 = &scif0;
+                serial1 = &scif1;
+                serial2 = &scif2;
+                serial3 = &scif3;
+                i2c0 = &i2c0;
+                i2c1 = &i2c1;
+                i2c3 = &i2c3;
+                mmc0 = &sdhi0;
+                mmc1 = &sdhi1;
+                ethernet0 = &eth0;
+                ethernet1 = &eth1;
+        };
+
 	memory@48000000 {
 		device_type = "memory";
 		/* first 128MB is reserved for secure area. */
@@ -65,6 +79,29 @@
 	};
 };
 
+&eth1 {
+        pinctrl-0 = <&eth1_pins>;
+        pinctrl-names = "default";
+        phy-handle = <&phy1>;
+        phy-mode = "rgmii-id";
+        status = "disabled";
+        renesas,no-ether-link;
+
+        phy1: ethernet-phy@0 {
+                reg = <0>;
+                mxl-8611x,led0_cfg = <(
+                        MXL8611X_LEDX_CFG_LINK_UP_TX_ACT_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_RX_ACT_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_1GB_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_100MB_ON |
+                        MXL8611X_LEDX_CFG_LINK_UP_10MB_ON
+                )>;
+                mxl-8611x,rx-internal-delay-ps = <0>;
+                mxl-8611x,tx-internal-delay-ps-100m = <2250>;
+                mxl-8611x,tx-internal-delay-ps-1g = <300>;
+        };
+};
+
 &drpai0 {
 	memory-region = <&drp_reserved>;
 	linux-memory-region = < &{/memory@48000000} >;

drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c

@@ -16,6 +16,7 @@
 #include <brcmu_utils.h>
 #include <defs.h>
 #include <brcmu_wifi.h>
+#include <brcm_hw_ids.h>
 #include "core.h"
 #include "debug.h"
 #include "tracepoint.h"
@@ -7373,6 +7374,16 @@ int brcmf_cfg80211_wait_vif_event(struct brcmf_cfg80211_info *cfg,
 				  vif_event_equals(event, action), timeout);
 }
 
+static bool brmcf_use_iso3166_ccode_fallback(struct brcmf_pub *drvr)
+{
+	switch (drvr->bus_if->chip) {
+	case BRCM_CC_4345_CHIP_ID:
+		return true;
+	default:
+		return false;
+	}
+}
+
 static s32 brcmf_translate_country_code(struct brcmf_pub *drvr, char alpha2[2],
 					struct brcmf_fil_country_le *ccreq)
 {
@@ -7381,18 +7392,28 @@ static s32 brcmf_translate_country_code(struct brcmf_pub *drvr, char alpha2[2],
 	s32 found_index;
 	int i;
 
-	country_codes = drvr->settings->country_codes;
-	if (!country_codes) {
-		brcmf_dbg(TRACE, "No country codes configured for device\n");
-		return -EINVAL;
-	}
-
 	if ((alpha2[0] == ccreq->country_abbrev[0]) &&
 	    (alpha2[1] == ccreq->country_abbrev[1])) {
 		brcmf_dbg(TRACE, "Country code already set\n");
 		return -EAGAIN;
 	}
 
+	country_codes = drvr->settings->country_codes;
+	if (!country_codes) {
+		if (brmcf_use_iso3166_ccode_fallback(drvr)) {
+			brcmf_dbg(TRACE, "No country codes configured for device, using ISO3166 code and 0 rev\n");
+			memset(ccreq, 0, sizeof(*ccreq));
+			ccreq->country_abbrev[0] = alpha2[0];
+			ccreq->country_abbrev[1] = alpha2[1];
+			ccreq->ccode[0] = alpha2[0];
+			ccreq->ccode[1] = alpha2[1];
+			return 0;
+		}
+
+		brcmf_dbg(TRACE, "No country codes configured for device\n");
+		return -EINVAL;
+	}
+
 	found_index = -1;
 	for (i = 0; i < country_codes->table_size; i++) {
 		cc = &country_codes->table[i];