19 lines
483 B
Makefile
19 lines
483 B
Makefile
# $NetBSD$
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DISTNAME= pyverilog-1.0.6
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PKGNAME= ${PYPKGPREFIX}-${DISTNAME:S/py//}
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CATEGORIES= category
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MASTER_SITES= ${MASTER_SITE_PYPI:=p/pyverilog/}
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MAINTAINER= jihbed.research@gmail.com
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HOMEPAGE= https://github.com/PyHDI/Pyverilog
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COMMENT= Python-based Hardware Design Processing Toolkit for Verilog HDL
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LICENSE= apache-2.0
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DEPENDS+= ${PYPKGPREFIX}-jinja2>=2.7.1:../../textproc/py-jinja2
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USE_LANGUAGES= # none
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.include "../../lang/python/egg.mk"
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.include "../../mk/bsd.pkg.mk"
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