Do not use x86 specific fence on Miri

2022-07-20 22:57:54 +09:00 · 2022-07-20 22:57:54 +09:00 · d61005fc79
parent bc4f426618
commit d61005fc79
1 changed files with 4 additions and 1 deletions
--- a/src/lib.rs
+++ b/src/lib.rs
@ -446,7 +446,10 @@ impl<T> fmt::Display for PushError<T> {
 /// Equivalent to `atomic::fence(Ordering::SeqCst)`, but in some cases faster.
 #[inline]
 fn full_fence() {
-    if cfg!(any(target_arch = "x86", target_arch = "x86_64")) {
+    if cfg!(all(
+        any(target_arch = "x86", target_arch = "x86_64"),
+        not(miri)
+    )) {
        // HACK(stjepang): On x86 architectures there are two different ways of executing
        // a `SeqCst` fence.
        //